DocumentCode :
897272
Title :
Design techniques for cascoded CMOS op amps with improved PSRR and common-mode input range
Author :
Ribner, David B. ; Copeland, Miles A.
Volume :
19
Issue :
6
fYear :
1984
fDate :
12/1/1984 12:00:00 AM
Firstpage :
919
Lastpage :
925
Abstract :
Internally compensated CMOS op amps have been widely used in sampled-analog signal processing applications over the past several years. However, the popular two-stage op amp suffers from poor AC power supply rejection to one of the power rails. Two circuits are presented that overcome the power-supply rejection ratio (PSRR) problems of the earlier amplifier: one for virtual ground applications such as switched-capacitor integrators, the other for buffer applications requiring wide common-mode input range. Small signal analysis is developed for the open-loop and PSRR responses of the two amplifiers. In addition, design guidelines are suggested and test results are presented.
Keywords :
Buffer circuits; CMOS integrated circuits; Linear integrated circuits; Operational amplifiers; buffer circuits; linear integrated circuits; operational amplifiers; CMOS process; CMOS technology; Guidelines; Operational amplifiers; Power amplifiers; Power supplies; Rails; Signal analysis; Signal processing; Switching circuits;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1984.1052246
Filename :
1052246
Link To Document :
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