• DocumentCode
    897612
  • Title

    A VLSI-Suitable Schottky-Barrier CMOS Process

  • Author

    SWIRHUN, Stanley E. ; Sangiorgi, Enrico ; Weeks, Andrew J. ; Swanson, Richard M. ; Saraswat, Krishna C. ; Dutton, Robert W.

  • Volume
    20
  • Issue
    1
  • fYear
    1985
  • Firstpage
    114
  • Lastpage
    122
  • Abstract
    Trenched Schottky-barrier (TSB) contact PMOS devices for use in latchup-free CMOS are examined in detail, and compared to Schottky-contact PMOS. Measurements and simulations show that the TSB structure has significant advantages in gain and current leakage over the Schottky-contact structure, CMOS using TSB PMOS may be made unconditionally free of Iatchup. The tradeoffs involving PMOS source-drain implant dose are made explicit and correlated to Iatchup measurements.
  • Keywords
    CMOS integrated circuits; Integrated circuit technology; Schottky-barrier diodes; VLSI; CMOS process; CMOS technology; Circuits; Implants; Laboratories; MOS devices; Power supplies; Thyristors; Very large scale integration; Voltage;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1985.1052283
  • Filename
    1052283
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=897612