Title :
Universal MOSFET hole mobility degradation models for circuit simulation
Author :
Agostinelli, V. Martin, Jr. ; Yeric, Greg M. ; Tasch, Al F., Jr.
Author_Institution :
Microelectron. Res. Center, Texas Univ., Austin, TX, USA
fDate :
3/1/1993 12:00:00 AM
Abstract :
Universal, semi-empirical MOSFET hole inversion layer mobility degradation models for use in circuit simulation programs such as SPICE are presented. By accurately predicting the mobility degradation due to acoustic phonon scattering and surface roughness scattering for p-channel MOSFETs at room temperature, these models eliminate the need for fitting parameters for each technology, which is required in the current SPICE level 3 model. The expressions reported accurately predict the mobility over a very wide range of channel doping concentrations, gate oxide thicknesses, gate voltage, and substrate bias, and they agree very well with recently published experimental mobility degradation data. When implemented in a circuit simulation code, these models will accurately determine the channel mobility in surface p-channel MOSFETs using only the channel doping concentration, gate oxide thickness, substate bias, and applied gate drive voltage as input parameters
Keywords :
SPICE; carrier mobility; circuit analysis computing; insulated gate field effect transistors; semiconductor device models; MOSFET; SPICE; acoustic phonon scattering; channel doping concentrations; channel mobility; circuit simulation; gate oxide thicknesses; gate voltage; hole mobility degradation models; p-channel; substrate bias; surface roughness scattering; Acoustic scattering; Circuit simulation; Degradation; Doping; MOSFET circuits; Predictive models; SPICE; Scattering parameters; Semiconductor process modeling; Surface fitting;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on