Demonstration of the potential of accumulation-mode MOS transistors on SOI substrates for high-temperature operation (150-300 degrees C)

Author

Flandre, D. ; Terao, A. ; Francis, P. ; Gentinne, B. ; Colinge, J.P.

Author_Institution

Lab. de Microelectron., Univ. Catholique de Louvain, Louvain-la-Neuve, Belgium

Volume

14

Issue

1

fYear

1993

Firstpage

10

Lastpage

12

Abstract

Measurements of accumulation-mode (AM) MOS SOI transistors in the 150-300 degrees C temperature range are reported and discussed. The increases of the threshold voltage shift and off leakage current with temperature of these SOI p-MOSFETs are observed to be much smaller than their bulk equivalents. Simple models are presented to support the experimental data.<>

Keywords

MOS integrated circuits; insulated gate field effect transistors; leakage currents; semiconductor device models; semiconductor-insulator boundaries; 150 to 300 C; MOS SOI transistors; SOI substrates; accumulation-mode MOS transistors; high temperature electronics; high-temperature operation; leakage current; modelling; p-MOSFETs; temperature range; threshold voltage shift; Doping; Engines; Leakage current; MOSFET circuits; Physics; Power generation; Semiconductor device modeling; Substrates; Temperature distribution; Threshold voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.215084

Filename

215084