Title :
Analysis and design optimization of domino CMOS logic with application to standard cells
Author :
Pretorius, Jacobus A. ; Shubat, Alex S. ; Salama, C. Andre T
fDate :
4/1/1985 12:00:00 AM
Abstract :
The application of domino logic to standard-cell-based design is discussed. Domino cells are compatible with static cells and can be used to achieve lower power consumption, as well as a reduction in area or an improvement in system speed. In order to optimise the delay/area performance of domino cells, an analytical model is presented and its validity verified by measurements on test cells implemented in both 5- and 3-/spl mu/m CMOS processes.
Keywords :
CMOS integrated circuits; Integrated logic circuits; Logic design; Optimisation; integrated logic circuits; logic design; optimisation; Analytical models; CMOS logic circuits; CMOS technology; Capacitance; Clocks; Delay; Design optimization; Logic design; Power dissipation; Semiconductor device modeling;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1985.1052338
