Electrical characteristics of textured polysilicon oxide prepared by a low-temperature wafer loading and N/sub 2/ preannealing process

Author

Wu, Shye Lin ; Lin, Ta Yow ; Lee, Chung Len ; Lei, Tai Fu

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

Volume

14

Issue

3

fYear

1993

fDate

3/1/1993 12:00:00 AM

Firstpage

113

Lastpage

114

Abstract

A low-temperature wafer loading and N/sub 2/ preannealing process was used to grow a thin textured polysilicon oxide. The polyoxide grown on the heavily doped polysilicon film exhibits less oxide tunneling leakage current and higher dielectric strength when the top electrode is positively biased.<>

Keywords

CVD coatings; annealing; chemical vapour deposition; dielectric thin films; electric breakdown of solids; electric strength; electronic conduction in insulating thin films; leakage currents; semiconductor-insulator boundaries; silicon compounds; surface texture; N/sub 2/ preannealing process; SiO/sub 2/-Si; breakdown field; dielectric strength; electrical characteristics; heavily doped polysilicon film; low-temperature wafer loading; oxide tunneling leakage current; polycrystalline Si; polyoxide; textured polysilicon oxide; Dielectric breakdown; Electric variables; Electrodes; Grain boundaries; Leakage current; Oxidation; Temperature; Thermal stresses; Tunneling; Turning;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.215128

Filename

215128