DocumentCode
898475
Title
Girth conditioning for construction of short block length irregular LDPC codes
Author
Ko, Y.-J. ; Kim, J.-H.
Author_Institution
Basic Res. Lab., Electron. & Telecommun. Res. Inst., Daejeon, South Korea
Volume
40
Issue
3
fYear
2004
Firstpage
187
Lastpage
188
Abstract
A girth conditioning scheme for construction of short block length low-density parity-check (LDPC) codes is presented. The parity-check matrix is generated in a column-by-column fashion under the condition that a newly added column is chosen, among a number of trial columns, to maximise the average girth of variable nodes. The girth-conditioned LDPC codes are found to give a large performance gain especially at high SNRs.
Keywords
block codes; matrix algebra; parity check codes; LDPC codes; SNR; column-by-column fashion; girth conditioning scheme; irregular low density parity check codes; parity check matrix; short block length construction;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20040120
Filename
1267553
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