Title :
TOPOLOGIZER: An Expert System Translator of Transistor Connectivity to Symbolic Cell Layout
Author :
Kollaritsch, Paul W. ; Weste, Neil H E
fDate :
6/1/1985 12:00:00 AM
Abstract :
TOPOLOGIZER is an expert system for the design of CMOS cells. TOPOLOGIZER uses heuristics (rules) specified by an expert designer to produce a custom-fit symbolic leaf-cell from a transistor connection description and a description of the environment in which the cell will reside. A symbolic layout system converts the symbolic description to a mask level description.
Keywords :
CMOS integrated circuits; Circuit layout CAD; Expert systems; Assembly systems; Circuits; Design automation; Expert systems; Humans; Instruments; Knowledge based systems; Logic arrays; Shape; Very large scale integration;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1985.1052385
