DocumentCode :
899074
Title :
An efficient eigenvector approach for finding netlist partitions
Author :
Hadley, Scott W. ; Mark, Brian L. ; Vannelli, Anthony
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Volume :
11
Issue :
7
fYear :
1992
fDate :
7/1/1992 12:00:00 AM
Firstpage :
885
Lastpage :
892
Abstract :
A fast eigenvector technique for obtaining good initial node partitions of netlists for use in interchange heuristics is described. The method is based on approximating the netlist or hypergraph by a weighted graph G, such that the sum of the cut edges in G tightly underestimates the number of cut nets in any netlist partition. An eigenvector technique is used to partition the graph G into k blocks of fixed module size. Another feature of this graph underestimation model of the netlist is that it allows one to obtain lower bounds on the actual number of cut nets. A multiblock node interchange heuristic is tested on the one resulting netlist partition obtained by this eigenvector approach on a variety of small to large sized benchmark netlist partitioning problems (between 300 to 12000 modules and nets). Test results on the larger netlists show that in most cases this eigenvector-node interchange approach yields netlist partitions with comparable or fewer cut nets than the best netlist partitions obtained by using node interchange heuristics alone on many random initial netlist partitions
Keywords :
VLSI; circuit layout CAD; graph theory; integrated logic circuits; printed circuit design; IC layout; PCB layout; blocks of fixed module size; eigenvector technique; graph underestimation model; hypergraph; initial node partitions; interchange heuristics; lower bounds; multiblock node interchange heuristic; netlist partition; netlist partitioning; number of cut nets; weighted graph; Benchmark testing; Computer aided manufacturing; Councils; Design automation; Helium; Joining processes; Mathematics; Printed circuits; Systems engineering and theory;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.144852
Filename :
144852
Link To Document :
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