A second-order double-sampled delta-sigma modulator using additive-error switching

Author

Burmas, Ted Vinko ; Dyer, Kenneth C. ; Hurst, Paul J. ; Lewis, Stephen H.

Author_Institution

Solid-State Circuits Res. Lab., California Univ., Davis, CA, USA

Volume

31

Issue

3

fYear

1996

fDate

3/1/1996 12:00:00 AM

Firstpage

284

Lastpage

293

Abstract

A second-order double-sampled delta-sigma modulator is described. It uses an additive-error switching scheme to convert capacitor mismatch into an additive out-of-band tone that can be removed by a digital filter. With a sampling rate of 5 MHz and an oversampling ratio of 256, the maximum measured signal-to-noise-and-distortion ratio (SNDR) is 86.3 dB, and the total harmonic distortion is -88.7 dB when the input is 2 dB below full scale. The modulator is fully differential, occupies 5 mm², and dissipates 13 mW

Keywords

digital filters; harmonic distortion; sampled data circuits; sigma-delta modulation; 13 mW; 5 MHz; SNDR; additive out-of-band tone; additive-error switching; capacitor mismatch; digital filter; double-sampled delta-sigma modulator; fully differential modulator; oversampling ratio; sampling rate; second-order modulator; signal-to-noise-and-distortion ratio; total harmonic distortion; Analog-digital conversion; Baseband; Capacitors; Clocks; Delta modulation; Digital filters; Operational amplifiers; Sampling methods; Signal to noise ratio; Solid state circuits;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.494190

Filename

494190