A DFT Approach for Testing Embedded Systems Using DC Sensors

In this article, we propose a sensor-based BIT scheme. By using sensors, we mitigate any issues related to signal integrity and diversity in the test response capture process. Also, BIT can provide a test framework to estimate specifications during production testing for various modules in a heterogeneous SoC or SiP. This scheme involves designing sensors for each module directly into the device under test (DUD and capturing sensor outputs that are low-frequency DC signals. A low-frequency mixed-signal tester can capture these sensor responses, analyze them to infer each specific module´s performance, and determine the overall pass-fail decision for the DUT. The embedded sensors perform the necessary signal conditioning of the DUT output signals, thereby significantly reducing the ATE´s response capture and analysis overhead. As an example, it´s possible to test a digital module for rise time by incorporating an integrator at the output node as a sensor. As the output node voltage increases, the integrator´s output capacitance charges to a DC value. The ATE samples the capacitor´s DC voltage at a specific time, and the DC voltage would be proportional to the DUT´s rise time. In this case, there would be no need to sample the rising waveform, and the ATE´s digitizer requirements could be significantly relaxed. This example indicates that during production testing, carefully chosen sensors can effectively simplify the overall test procedure