DocumentCode :
900975
Title :
A 1.0-ns 5-kbit ECL RAM
Author :
Chuang, Ching-Te ; Tang, Denny D. ; Li, G.P. ; Hackbarth, Edward ; Boedeker, Russell R.
Volume :
21
Issue :
5
fYear :
1986
fDate :
10/1/1986 12:00:00 AM
Firstpage :
670
Lastpage :
674
Abstract :
A bipolar 512×10-bit emitter-coupled logic (ECL) RAM with an access time of 1.0 ns and a power dissipation of 2.4 W, achieving an access-time power/bit product of 0.48 pJ/bit, has been developed. The RAM was fabricated using an advanced bipolar technology featuring poly-base self-alignment, poly-emitter shallow profile, and silicon-filled trench isolation with a minimum mask dimension of 1.2 μm. A Schottky-clamped multiemitter cell with a cell size of 760 μm/SUP 2/ is obtained as a result of compact cell layout and the use of 1.2-μm trench isolation.
Keywords :
Bipolar integrated circuits; Emitter-coupled logic; Integrated memory circuits; Random-access storage; bipolar integrated circuits; emitter-coupled logic; integrated memory circuits; random-access storage; Cache memory; Geometry; Isolation technology; Lithography; Optical device fabrication; Power dissipation; Random access memory; Read-write memory; Schottky barriers; Silicon;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1986.1052593
Filename :
1052593
Link To Document :
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