DocumentCode
901242
Title
A 15-ns 8-kbit junction-shorting registered PROM
Author
Fukushima, Toshitaka ; Miyamura, Tamio ; Tanaka, Kazuo
Volume
21
Issue
5
fYear
1986
fDate
10/1/1986 12:00:00 AM
Firstpage
861
Lastpage
868
Abstract
An 8-kb junction-shorting registered PROM which has a fast clock access time of 15 ns and a fast address setup time of 20 ns has been developed. Field programmable junction-shorting memory cells were used for both PROM data of 1024 words×8 bits. The device is housed in a 300-mil-width DIP package. The power dissipation is 650 mW.
Keywords
PROM; Buffer storage; Circuit synthesis; Clocks; Flip-flops; Hazards; Inverters; PROM; Power dissipation; Registers; Space technology;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1986.1052618
Filename
1052618
Link To Document