Observation of latch-up time evolution in CMOS IC´s by means of SEM stroboscopic voltage contrast techniques

SEM stroboscopic voltage contrast techniques allow one to observe with high voltage resolution the temporal and spatial evolution of latch-up phenomena from the firing event to the final condition. In particular, the authors show by means of an example that in a CMOS IC the firing point may be different from the latch-up site in steady state. Only dynamic observations, therefore, allow a complete understanding of latch-up phenomena and an effective correction of IC layout.