DocumentCode :
902228
Title :
Collection of Charge on Junction Nodes from Ion Tracks
Author :
Messenger, G.C.
Author_Institution :
Rockwell International Autonetics Strategic Systems Division Defense Electronics Operations 3370 Miraloma Avenue Anaheim, CA 92803
Volume :
29
Issue :
6
fYear :
1982
Firstpage :
2024
Lastpage :
2031
Abstract :
The collection of charge from ion tracks can produce logic upset and memory change in high density integrated circuits. It has been experimentally observed that drift conduction usually plays a dominant role when the ion track penetrates a junction. The first charge collection analysis concentrated on the diffusion conduction process. A recent analysis emphasizes drift conduction and describes the "funnel" which produces drift collection from the substrate. The funneling phenomenon has been modelled using two-dimensional computer simulations. It is extremely desirable to develop analytical solutions tp better understand the problem and to provide the basis for modelling the effect in circuit and system analysis computer codes such as SYSCAP. This paper develops an approximate analytic solution expressed as I(t) = Io [exp(-¿t) - exp (-ßt)] (1) where Io is approximately the maximum current, 1/¿ is the collection time constant of the junction, and 1/ß is the time constant for initially establishing the ion track. The junction time constant is shown to be K¿o/q¿ND, and it increases slowly with funnel length when a funnel is present. The analysis shows that the excess carriers move almost exclusively by ambipolar diffusion for very early times, and that the fields present in semiconductor devices, including p-n junction fields, collapse. Ambipolar diffusion proceeds until the excess carrier concentration is reduced to approximately the background doping density at which time the junction field is restored and the carriers move by drift.
Keywords :
Analytical models; Charge carrier processes; Circuit analysis computing; Computational modeling; Computer aided software engineering; Geometry; Logic circuits; Poisson equations; Silicon; Substrates;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.1982.4336490
Filename :
4336490
Link To Document :
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