An ECL-compatible GaAs MESFET 1-kbit static RAM

Author

Mclevige, William V. ; Chang, Christopher T M ; Taddiken, Albert H.

Volume

22

Issue

2

fYear

1987

fDate

4/1/1987 12:00:00 AM

Firstpage

262

Lastpage

267

Abstract

A fully ECL-compatible GaAs enhancement/depletion (E/D)-MESFET 1-kb static RAM was designed, fabricated, and tested. Direct-coupled FET logic is used for the memory array while buffered FET logic is utilized in the peripheral circuitry to provide an ECL 100 K interface. The memory cell area is 774 μm/SUP 2/, and the chip size is 2.0×1.75 mm/SUP 2/. Fabrication of the 1-kb RAM involves a fully implanted two-threshold process with true double-level metal interconnection. A minimum access time of 1.3 ns has been obtained with a total power dissipation of 1.4 W (memory array power dissipation is only ~40 mW). The output voltage swing across a 50-Ω load is 750 mV.

Keywords

Emitter-coupled logic; Field effect integrated circuits; Gallium arsenide; III-V semiconductors; Integrated memory circuits; Random-access storage; Schottky gate field effect transistors; emitter-coupled logic; field effect integrated circuits; gallium arsenide; integrated memory circuits; random-access storage; Circuit testing; FETs; Fabrication; Gallium arsenide; Logic arrays; Logic circuits; MESFETs; Power dissipation; Random access memory; Read-write memory;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.1987.1052711

Filename

1052711