DocumentCode
902515
Title
Interframe Bus Encoding Technique and Architecture for MPEG-4 AVC/H.264 Video Compression
Author
Bahari, Asral ; Arslan, Tughrul ; Erdogan, Ahmet T.
Author_Institution
Sch. of Microelectron. Eng., Univ. Malaysia Perlis, Arau, Malaysia
Volume
18
Issue
5
fYear
2010
fDate
5/1/2010 12:00:00 AM
Firstpage
831
Lastpage
835
Abstract
In this paper, we propose an implementation of a data encoder to reduce the switched capacitance on a system bus. Our technique focuses on transferring raw video data for multiple reference frames between off- and on-chip memories in an MPEG-4 AVC/H.264 encoder. This technique is based on entropy coding to minimize bus transition. Existing techniques exploit the correlation between neighboring pixels. In our proposed technique, we exploit pixel correlation between two consecutive frames. Our method achieves a 58% power saving compared to an unencoded bus when transferring pixels on a 32-b off-chip bus with a 15-pF capacitance per wire.
Keywords
data compression; entropy codes; system buses; video coding; MPEG-4 AVC/H.264; data encoder; entropy coding; interframe bus encoding technique; multiple reference frames; off-chip memory; on-chip memory; system bus; video compression; Data buses; encoding; integrated circuit design; video coding;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2009.2015324
Filename
4957021
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