Title :
Implementation of a bipolar real-time image signal processor-RISP-II
Author :
Aono, K. ; Maruyama, Mihoko ; Mori, Takayoshi ; Yamada, Hiroyoshi
fDate :
6/1/1987 12:00:00 AM
Abstract :
The high-speed digital image signal processor RISP-II, an improved version of the original real-time image signal processor (RISP) for gray-level image processing, is discussed. RISP-II has a microprogrammable architecture and a per-chip processing speed of 100 million instructions per second. Multichip processing has been realized by two added features: parallelism and pipelining. In the multichip mode its processing power can easily be increased. As a result, RISP-II is capable of real-time processing of the image data of a moving object. RISP-II, implemented in an advanced bipolar ECL technology, has integrated 20600 elements on a chip of 6×6 mm/SUP 2/. Its power dissipation is 1.6 W.
Keywords :
Bipolar integrated circuits; Computerised picture processing; Emitter-coupled logic; Microprocessor chips; Parallel processing; Pipeline processing; bipolar integrated circuits; computerised picture processing; emitter-coupled logic; microprocessor chips; parallel processing; pipeline processing; Clocks; Digital images; Image processing; Image sampling; Magnetooptic recording; Pipeline processing; Power dissipation; Signal processing; Signal sampling; Very large scale integration;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1987.1052739
