DocumentCode
902559
Title
FEBRIS: a chip for pattern recognition
Author
Pelgrom, Marcel J M ; Wulms, Henk E J ; Van der stokker, Pierre ; Bergamaschi, Reinaldo A.
Volume
22
Issue
3
fYear
1987
fDate
6/1/1987 12:00:00 AM
Firstpage
423
Lastpage
429
Abstract
A chip that performs and evaluates a 16×16-pixel comparison for application in pattern recognition systems is described. The on-chip data organization and the Wallace-tree evaluation circuits are described. The chip has been realized in a 2-μm NMOS process and operated at 18 MHz, thus performing four gigapixel operations per second.
Keywords
Computerised pattern recognition; Computerised picture processing; Field effect integrated circuits; Microprocessor chips; Signal processing equipment; computerised pattern recognition; computerised picture processing; field effect integrated circuits; microprocessor chips; signal processing equipment; Cameras; Costs; Density estimation robust algorithm; Hardware; Integrated circuit reliability; Laboratories; MOS devices; Pattern recognition; Performance evaluation; Power system reliability;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1987.1052742
Filename
1052742
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