Title :
High-speed iterative multiplier
Author :
Burton, D.P. ; Noaks, D.R.
Author_Institution :
University of Birmingham, Department of Electronic & Electrical Engineering, Birmingham, UK
Abstract :
An iterative array is proposed which reduces the multiplication of two binary numbers to one pass through the array and a summation of the outputs produced.
Keywords :
circuits and sub-assemblies; logic and computing circuits; switching systems;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19680200
