DocumentCode
904372
Title
DC-coupled low-power digit detector
Author
Fujimura, Yuhji ; Kataoka, Keisuke
Volume
7
Issue
5
fYear
1972
fDate
10/1/1972 12:00:00 AM
Firstpage
418
Lastpage
421
Abstract
A monolithic integrated digit detector for a plated-wire memory system is described. It consists of a two-stage differential amplifier, a narrow-strobe gate, a preset gate, and a register (a set-reset flip-flop) that stores the detected signal during the time between the narrow-strobe pulse and the preset pulse. The device features high sensitivity of 1.3 mV and low-power dissipation of 100 mW. This high-sensitivity low-power digit detector is suitable for low-cost integration.
Keywords
Digital integrated circuits; Monolithic integrated circuits; Semiconductor storage devices; digital integrated circuits; monolithic integrated circuits; semiconductor storage devices; Detectors; Differential amplifiers; Flip-flops; Monolithic integrated circuits; Pulse amplifiers; Registers; Resistors; Timing; Voltage; Wire;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1972.1052902
Filename
1052902
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