Title :
DC-coupled low-power digit detector
Author :
Fujimura, Yuhji ; Kataoka, Keisuke
fDate :
10/1/1972 12:00:00 AM
Abstract :
A monolithic integrated digit detector for a plated-wire memory system is described. It consists of a two-stage differential amplifier, a narrow-strobe gate, a preset gate, and a register (a set-reset flip-flop) that stores the detected signal during the time between the narrow-strobe pulse and the preset pulse. The device features high sensitivity of 1.3 mV and low-power dissipation of 100 mW. This high-sensitivity low-power digit detector is suitable for low-cost integration.
Keywords :
Digital integrated circuits; Monolithic integrated circuits; Semiconductor storage devices; digital integrated circuits; monolithic integrated circuits; semiconductor storage devices; Detectors; Differential amplifiers; Flip-flops; Monolithic integrated circuits; Pulse amplifiers; Registers; Resistors; Timing; Voltage; Wire;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1972.1052902
