DocumentCode
905883
Title
Hi-Speed Versatile Serial Crate Controller for CAMAC
Author
Horelick, D.
Author_Institution
Stanford Linear Accelerator Center Stanford, California 94305
Volume
32
Issue
1
fYear
1985
Firstpage
282
Lastpage
285
Abstract
A serial crate controller, primarily for use in the SLC CAMAC control system, has been designed, and has been in use for about 2 years. The design supports a party line approach, with up to 16 crates on a single twisted pair for data transfers, plus another pair for prompt L response. The bit rate is 5 megabits/s, and complete transaction times of about 10 ps are achieved for 16-bit data transfers over cables up to 1000 feet long. One of the primary objects of the design was simplicity - there are approximately 60 chips in the two-board unit.
Keywords
Automatic control; Bit rate; CAMAC; Cables; Control systems; Impedance; Klystrons; Linear accelerators; Protocols; Timing;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1985.4336838
Filename
4336838
Link To Document