Development of a switched capacitor based multi-channel transient waveform recording integrated circuit

A full-custom integrated circuit addressing the problem of transient analog signal recording is presented. The chip includes 2048 sample-and-hold cells, fast-clock-generation logic, and readout amplifiers. The sample-and-hold circuits are divided into 16 channels of 128 samples per channel. One read amplifier is used per channel. Clock signals are generated by on-chip redundant interleaved shift registers. The circuit is designed in an inexpensive and widely available 3- mu m, single-metal, double-polysilicon CMOS process that allows easy integration of high-density digital and analog circuitry with the possibility of very-low-power operation. Prototypes have been fabricated and proved to be operational.