Performance Report for Stanford/SLAC Microstore Analog Memory Unit

Tests of a newly developed Analog Memory Unit (AMU) are described. The device contains 256 analog storage cells consisting of pass transistors, a storage capacitor and a differential read out buffer. By addressing the storage cells sequentially, the shape of the signal present at the input can be recorded in time. Fast response and good amplitude resolution were the design goals for the development. Measurements on individual devices will be presented and the status of hybridized subsystems containing eight AMUs discussed.