• DocumentCode
    907202
  • Title

    The generation of a class of multipliers: synthesizing highly parallel algorithms in VLSI

  • Author

    Chen, Marina C.

  • Author_Institution
    Dept of Comput. Sci., Yale Univ., New Haven, CT, USA
  • Volume
    37
  • Issue
    3
  • fYear
    1988
  • fDate
    3/1/1988 12:00:00 AM
  • Firstpage
    329
  • Lastpage
    338
  • Abstract
    A synthesis method for designing highly parallel algorithms in VLSI is presented. To illustrate the method, the familiar long multiplication algorithm for binary numbers is used. This algorithm is specified in the language Crystal, a very-high-level language for parallel processing. A total of 18 designs are derived from this specification. Each is optimal within its own class, which is characterized by a space-time map. The relative merits and tradeoffs of different designs are systematically compared and evaluated
  • Keywords
    VLSI; digital arithmetic; parallel algorithms; parallel architectures; Crystal; VLSI; binary numbers; highly parallel algorithms synthesis; long multiplication algorithm; multipliers; Algorithm design and analysis; Design methodology; Equations; Parallel algorithms; Parallel architectures; Parallel processing; Signal processing algorithms; Signal synthesis; Systolic arrays; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.2170
  • Filename
    2170