DocumentCode
907474
Title
Algorithm for reducing circuit equations in computer applications
Author
Natarajan, S.
Author_Institution
Dept. of Electr. Eng., Tennessee Technol. Univ., Cookeville, TN, USA
Volume
137
Issue
1
fYear
1990
fDate
2/1/1990 12:00:00 AM
Firstpage
16
Lastpage
20
Abstract
The problem of computer formulation of circuit equations using the modified nodal analysis, especially in microcomputers, is addressed. The modified nodal formulation gives rise to a disproportionately large number of circuit equations even for small-size networks. An algorithm is presented to reduce the circuit equations to a very small number before solving them repeatedly, as in the case of obtaining frequency- and/or time-domain responses. This reduces the memory requirement as well as run time for the solution of network responses. Though this is useful in any computer-aided analysis of networks, it is especially useful in microcomputers where these two facts are significantly important. This also eliminates the need for solving the circuit equations using sparse matrix techniques
Keywords
circuit analysis computing; frequency-domain analysis; microcomputer applications; time-domain analysis; circuit equations reduction; computer formulation; computer-aided analysis; frequency-domain response; memory-requirement reduction; microcomputers; modified nodal analysis; run time-reduction; time-domain responses;
fLanguage
English
Journal_Title
Circuits, Devices and Systems, IEE Proceedings G
Publisher
iet
ISSN
0956-3768
Type
jour
Filename
217032
Link To Document