DocumentCode
907605
Title
Programmable current-mode neural network for implementation in analogue MOS VLSI
Author
Borgstrom, T.H. ; Ismail, M. ; Bibyk, S.B.
Author_Institution
Semicond. Res. Lab., Matsushita Electr. Works Ltd., Osaka, Japan
Volume
137
Issue
2
fYear
1990
fDate
4/1/1990 12:00:00 AM
Firstpage
175
Lastpage
178
Abstract
The authors present simple and efficient circuit techniques for the implementation of feedback and feedforward neural networks in analogue MOS VLSI. Synaptic weight storage is achieved using programmable threshold-voltage devices, such as the metal-nitride-semiconductor transistor and the floating-gate MOS transistor. Basic electronic neural functions, such as adaptive weighted summation and sigmoidal nonlinearity functions, are implemented using simple current-mode analogue signal processing building blocks. This is particularly attractive when neural networks of increased complexity are implemented in modern scaled VLSI technologies, where voltage signal handling is severely limited for analogue applications. A four-neuron chip is designed, using the new current-mode building blocks, fabricated and experimentally verified using the MOSIS 2 μm double-poly, double-metal p -well CMOS process. Intensive computer simulation and experimental results are provided
Keywords
CMOS integrated circuits; MOS integrated circuits; VLSI; analogue computer circuits; feedback; neural nets; 2 micron; MNOS device; MOSIS; adaptive weighted summation; analogue MOS VLSI; analogue signal processing building blocks; computer simulation; current-mode; double-metal; double-poly; feedback; feedforward; floating-gate MOS transistor; four-neuron chip; metal-nitride-semiconductor transistor; neural network; p-well CMOS process; programmable threshold-voltage devices; scaled VLSI technologies; sigmoidal nonlinearity functions; synaptic weight storage;
fLanguage
English
Journal_Title
Circuits, Devices and Systems, IEE Proceedings G
Publisher
iet
ISSN
0956-3768
Type
jour
Filename
217048
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