DocumentCode :
907907
Title :
Error analysis of digital filters realized with floating-point arithmetic
Author :
Liu, Bede ; Kaneko, Toyohisa
Author_Institution :
Princeton University, Princeton, NJ
Volume :
57
Issue :
10
fYear :
1969
Firstpage :
1735
Lastpage :
1747
Abstract :
This paper calculates the error at the output of a digital filter using floating-point arithmetic operations due to roundoff accumulation and input quantization. Expressions are derived for the mean square error for each of the three canonical forms of realization: direct, cascade, and parallel. Upper bounds that are useful for a special class of filters are given. The theoretical result is found to be in good agreement with the experimental result.
Keywords :
Circuits; Digital filters; Error analysis; Floating-point arithmetic; Hardware; Mean square error methods; Quantization; Radar signal processing; Upper bound; Visualization;
fLanguage :
English
Journal_Title :
Proceedings of the IEEE
Publisher :
ieee
ISSN :
0018-9219
Type :
jour
DOI :
10.1109/PROC.1969.7388
Filename :
1449318
Link To Document :
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