DocumentCode
908114
Title
Mathematical techniques for low-cost optimisation of digital MOS circuits
Author
Hoppe, B.
Author_Institution
VDO-Adolf Schindling AG, Schwalbach-Taunus, West Germany
Volume
137
Issue
5
fYear
1990
fDate
10/1/1990 12:00:00 AM
Firstpage
340
Lastpage
344
Abstract
The author discusses, optimisation methods for MOS VLSI digital circuits. Typically, signal delay, chip area and power dissipation are the optimisation criteria. Since they are in conflict, complex multiobjective programming problems have to be solved. Novel mathematical methods are presented, which allow for a complete and accurate solution at low computational cost. The new methods guarantee that only the relevant global design optima are calculated. There is no confusion with solutions that are only of local optimality. This reduces the numerical effort and eliminates convergence problems found for other algorithms
Keywords
CMOS integrated circuits; VLSI; digital integrated circuits; integrated logic circuits; logic design; mathematical programming; CMOS logic circuits; MOS VLSI digital circuits; algorithms; chip area; complex multiobjective programming; convergence; digital MOS circuits; global design optima; low-cost optimisation; numerical effort; optimisation methods; power dissipation; signal delay;
fLanguage
English
Journal_Title
Circuits, Devices and Systems, IEE Proceedings G
Publisher
iet
ISSN
0956-3768
Type
jour
Filename
217105
Link To Document