Comparison of five high speed bistables by computer simulation

The paper describes five different emitter-coupled logic (ECL) bistable designs and their comparison, both in the divide by 2 and transmission modes of operation, using computer simulation techniques. By adopting a single transistor model, performance differences due to processing variations have been eliminated. Factors affecting the operating rate of a bistable are discussed, and the simulations show one design to have the fastest maximum toggle frequency of 920 MHz, and a different one the shortest average slave output transition time of 400 ps. The optimum design is a balanced bistable with single emitter follower level shifting between stages. This has been fabricated using the BTRL ECL 40 process, and measurements show that the maximum transmission rate is 1 Gbit/s.