Title :
The pRAM: an adaptive VLSI chip
Author :
Clarkson, T.G. ; Ng, Chi Kwong ; Guan, Yelin
Author_Institution :
Dept. of Electron. & Electr. Eng., King´´s Coll., London, UK
fDate :
5/1/1993 12:00:00 AM
Abstract :
The pRAM (probabilistic RAM) is a nonlinear stochastic device with neuron like behavior. The pRAM is realizable in hardware, and the third-generation VLSI pRAM chip is described. This chip is adaptive since learning algorithms have been incorporated on-chip, using reinforcement training. The pRAM chip is also adaptive with respect to the interconnections between neurons. Results achieved from a small net of pRAM´s performing a pattern-recognition task using reinforcement training are presented
Keywords :
VLSI; learning (artificial intelligence); neural chips; pattern recognition equipment; random-access storage; VLSI; interconnections; learning algorithms; neuron like behavior; nonlinear stochastic device; pRAM; pattern-recognition task; probabilistic RAM; reinforcement training; Arithmetic; Biological system modeling; Hardware; Helium; Neurons; Phase change random access memory; Read-write memory; Stochastic processes; Table lookup; Very large scale integration;
Journal_Title :
Neural Networks, IEEE Transactions on
