Title :
Temperature accelerated gate oxide degradation under plasma-induced charging
Author :
Brozek, Tomasz ; Chan, Y.David ; Viswanathan, Chand R.
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
fDate :
6/1/1996 12:00:00 AM
Abstract :
Gate oxide charging during plasma processing of submicron devices becomes a serious yield and reliability concern, especially when oxide thickness and device dimensions shrink to the nanoscale region. This paper shows that wafer temperature is a crucial parameter for charging-induced oxide degradation due to plasma processing. Experimental results from plasma damaged submicron MOS transistors, namely low-level gate leakage and degraded charge-to-breakdown characteristics are analyzed from the point of view of conditions of electrical stress. Laboratory experiments simulating plasma charging, performed at 150/spl deg/C, confirmed that elevated temperature during plasma processing strongly accelerates oxide degradation and even at low-level stress leads to effects observed in plasma damaged devices.
Keywords :
CMOS integrated circuits; MOSFET; dielectric thin films; electric breakdown; integrated circuit reliability; plasma applications; semiconductor device reliability; surface charging; 150 C; charge-to-breakdown characteristics; charging-induced oxide degradation; electrical stress; elevated temperature; gate oxide degradation; low-level gate leakage; plasma damaged MOSFETs; plasma processing; plasma-induced charging; reliability; submicron MOS transistors; submicron devices; temperature accelerated degradation; wafer temperature; yield; Acceleration; Degradation; Nanoscale devices; Plasma accelerators; Plasma devices; Plasma materials processing; Plasma properties; Plasma simulation; Plasma temperature; Stress;
Journal_Title :
Electron Device Letters, IEEE