Title :
A 16-b 320-kHz CMOS A/D converter using two-stage third-order ΣΔ noise shaping
Author :
Yin, Guangming ; Stubbe, Frederic ; Sansen, Willy
Author_Institution :
Dept. Elektrotechniek, Katholieke Univ. Leuven, Heverlee, Belgium
fDate :
6/1/1993 12:00:00 AM
Abstract :
The design and measured performance of a two-stage third-order ΣΔ (sigma-delta) analog-to-digital (A/D) converter is described. The A/D converter achieves a 96-dB dynamic range and a maximum signal-to-noise-plus-distortion ratio (S/(N+ D)) r.m.s./r.m.s. of 93 dB with 320-kHz output rate and an oversampling ratio of 64. An analysis of the integrator gain error is presented. The modulator is realized in a 1.2-μm double-metal single-poly CMOS process with an active area of 1.6 mm2. This modulator operates from a 5-V power supply and a single reference voltage
Keywords :
CMOS integrated circuits; analogue-digital conversion; delta modulation; modulators; 320 kHz; 5 V; 5-V power supply; CMOS A/D converter; double-metal; integrator gain error; modulator; monolithic ADC; oversampling ratio; sigma-delta noise shaping; single reference voltage; single-poly CMOS process; sixteen bit-resolution; third-order; two-stage; Analog-digital conversion; Baseband; Delta-sigma modulation; Dynamic range; Noise measurement; Noise shaping; Operational amplifiers; Parasitic capacitance; Signal to noise ratio; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
