Title :
Hole mobility enhancement in MOS-gated Ge/sub x/Si/sub 1-x//Si heterostructure inversion layers
Author :
Garone, P.M. ; Venkataraman, V. ; Sturm, James C.
Author_Institution :
Dept. of Electr. Eng., Princeton Univ., NJ, USA
Abstract :
Effective hole mobility enhancements of 50% at room temperature and over 100% at 90 K, compared to all-Si controlled devices, are demonstrated by placing a buried epitaxial Ge/sub x/Si/sub 1-x/ layer 7.5 to 10.0 nm beneath the gate oxide of a PMOS transistor. Mobility degradation caused by misfit dislocations in the inversion region is seen in structures with GeSi/sub 1-x/ layers that exceed the equilibrium critical thickness.<>
Keywords :
Ge-Si alloys; carrier mobility; insulated gate field effect transistors; inversion layers; semiconductor epitaxial layers; semiconductor quantum wells; 7.5 to 10 nm; 90 K; Ge/sub x/Si/sub 1-x/-Si; MOS gated heterostructures; PMOS transistor; buried GeSi layer; equilibrium critical thickness; heterostructure inversion layers; hole mobility enhancement; misfit dislocations; room temperature; Aluminum; Annealing; Capacitance-voltage characteristics; Carrier confinement; Degradation; MOS devices; MOSFET circuits; Particle scattering; Temperature control;
Journal_Title :
Electron Device Letters, IEEE
