DocumentCode :
909995
Title :
A temperature-stabilized SOI voltage reference based on threshold voltage difference between enhancement and depletion NMOSFET´s
Author :
Song, Ho-Jun ; Kim, Choong-ki
Author_Institution :
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea
Volume :
28
Issue :
6
fYear :
1993
fDate :
6/1/1993 12:00:00 AM
Firstpage :
671
Lastpage :
677
Abstract :
A temperature-stabilized silicon-on-insulator (SOI) voltage reference is presented. It is based on the threshold voltage difference between enhancement and depletion SOI NMOSFETs that have the same channel doping concentration but of opposite type. The circuit has been realized on a SIMOX wafer using an n+-poly gate and a LOCOS isolation process. The threshold voltages of the enhancement and depletion SOI NMOSFETs show almost the same temperature dependence when a suitable back-gate bias is applied. Experimental results show a temperature coefficient of 33.8 p.p.m./°C over the temperature range of -50 to 75°C. The variation of threshold voltage difference with temperature is small, and this circuit becomes more advantageous as the front-gate oxide is scaled down or the bias current is reduced
Keywords :
MOS integrated circuits; SIMOX; linear integrated circuits; reference circuits; stability; -50 to 75 degC; LOCOS isolation; NMOSFETs; SIMOX wafer; SOI voltage reference; Si; back-gate bias; channel doping concentration; depletion mode; enhancement mode; n-channel MOSFET; n+-poly gate; temperature dependence; temperature-stabilized; threshold voltage difference; Bipolar transistors; CMOS technology; Doping; Electric variables; MOSFET circuits; Space technology; Temperature dependence; Temperature distribution; Threshold voltage; Voltage control;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.217982
Filename :
217982
Link To Document :
بازگشت