DocumentCode
910070
Title
A 32-Bit FASTBUS Computer
Author
Blossom, J.M. ; Hong, J.P. ; Kellner, R.G.
Author_Institution
Los Alamos National Laboratory E-10 Data Systems, MS K488 Los Alamos, NM 87545
Volume
33
Issue
1
fYear
1986
Firstpage
808
Lastpage
810
Abstract
Los Alamos National Laboratory is building a 32-bit FASTBUS computer using the NATIONAL SEMICONDUCTOR 32032 central processing unit (CPU) and containing 16 million bytes of memory. The board can act both as a FASTBUS master and as a FASTBUS slave. It contains a custom direct memory access (DMA) channel which can perform 80 million bytes per second block transfers across the FASTBUS.
Keywords
Central Processing Unit; Clocks; Fastbus; Hardware; Laboratories; Master-slave; Memory management; Programmable logic arrays; Programming; Registers;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1986.4337222
Filename
4337222
Link To Document