• DocumentCode
    910230
  • Title

    FASTRUN - A High Performance Computing Device for Molecular Mechanics Using a Pipeline Architecture

  • Author

    Dimmler, D.G. ; Fine, R. ; Levinthal, C.

  • Author_Institution
    Brookhaven National Laboratory, Upton, NY 11973-5000
  • Volume
    33
  • Issue
    1
  • fYear
    1986
  • Firstpage
    870
  • Lastpage
    874
  • Abstract
    A deep, synchronous pipeline architecture has been selected for a computing device with a power of 500 Million floating point operations per second (MFlops). The device calculates the forces and energy due to pair-wise interactions of many objects in a system. Considerations relating to application specific high-performance computer architectures are addressed. In addition, topics specifically relating to very deep, synchronous unidirectional pipelines are discussed. A key element of the device, a quadratic interpolator based on a lookup table, has been developed and tested. Five of these interpolators with a total computing power of 280 Mflops will be employed in the device.
  • Keywords
    Computer architecture; Costs; Hardware; High performance computing; Laboratories; Pipelines; Power generation economics; Scheduling algorithm; Software algorithms; Supercomputers;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.1986.4337238
  • Filename
    4337238