WATPC: A Computer-Aided Design Package for Digital Bipolar Integrated Circuits

Recent advances in integrated circuit technology have involved process development, device, and circuit optimization under scaled design rules. It is advantageous to be able to simulate the overall circuit performance under different conditions. A simulator which performs this task at the logic gate level becomes important. This paper describes such a simulator for digital bipolar integrated circuit families: WATPAC. WATPAC uses the process simulator SUPREM, the device simulator BIPOLE, and the circuit simulator WATAND. The input parameters to WATPAC are entered interactively. These consist of fabrication process parameters, layout design rules, a specification of the logic family, and a WATPAC predefined logic function. The WATPAC output consists of overall circuit performance data for the simulated function block. The output of WATPAC also includes the intermediate outputs of the process simulator, device simulator, and the circuit simulator.