DocumentCode :
912139
Title :
A Logic Simulation Machine
Author :
Abramovici, Miron ; Levendel, Ytzhak H. ; Menon, Permachandran R.
Author_Institution :
Bell Laboratories, Naperville, IL, USA
Volume :
2
Issue :
2
fYear :
1983
fDate :
4/1/1983 12:00:00 AM
Firstpage :
82
Lastpage :
94
Abstract :
Special-purpose CAD hardware is increasingly being considered as a means to meet the challenge posed to conventional (software-based) CAD tools by the growing complexity of VLSI circuits. In this paper we describe the architecture of a logic simulation machine employing distributed and parallel processing. Our architecture can accommodate different levels of modeling ranging from simple gates to complex functions, and support timing analysis. We estimate that simulation implemented by the proposed special-purpose hardware will be between 10 and 60 times faster than currently used software algorithms running on general-purpose computers. With the available technology, a throughput of 1 000 000 gate evaluations/sec can be achieved.
Keywords :
design verification; logic design; special-purpose architecture; Circuit simulation; Computational modeling; Computer simulation; Hardware; Logic; Parallel processing; Software algorithms; Throughput; Timing; Very large scale integration;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.1983.1270024
Filename :
1270024
Link To Document :
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