• DocumentCode
    912194
  • Title

    Table Look-Up MOSFET Modeling System Using a 2-D Device Simulator and Monotonic Piecewise Cubic Interpolation

  • Author

    Shima, Tal ; Tamada, Haruaki

  • Volume
    2
  • Issue
    2
  • fYear
    1983
  • fDate
    4/1/1983 12:00:00 AM
  • Firstpage
    121
  • Lastpage
    126
  • Abstract
    This paper describes a method for connecting an MOSFET 2-D device simulator to a circuit simulator via a 3-D table look-up MOSFET model. The computational cost of the device simulator is drastically reduced by a proposed monotonic piecewise cubic interpolation technique. With this technique, the device simulator needs to calculate only 100 ~ 200 points to make up an accurate 3-D table look-up MOSFET model. The computational time necessary for the interpolation is only about one third of the time for calculating one current point by the device simulator.
  • Keywords
    Circuit simulation; Computational modeling; Design automation; Interpolation; Laboratories; Logic arrays; MOSFET circuits; Numerical models; Research and development; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.1983.1270029
  • Filename
    1270029