Efficient Single-Layer Routing Along a Line of Points

In this paper we present several new procedures for carrying out the track assignment phase involved in channel routing. Our procedures are based upon the concept of an access graph which provides information dealing with the availability of routing space between pins in a layout. Paths for signal nets are then found by searching for optimal paths in the access graph. These paths can then be easily mapped back into routed wire segments on a VLSI chip. We consider only the case of single-layer routing within a single channel. We allow for wires to be on both sides of the line of pins to be processed, as well as between the pins. We consider two models, the first where the track availability is infinite, or equivalently, where wires are infinitely thin. We then consider the more realistic case where the track density in the channel is fixed. Our procedure for this case, called floating-track assignment, allows a wire, once assigned to a track, to be reassigned to a different track in order to enhance routability. For this case, we consider three objective functions, namely, minimal wire length, minimal congestion, and minimal perturbation. Both theoretical and experimental results are presented.