DocumentCode
912493
Title
A Depletion-Mode MOSFET Model for Circuit Simulation
Author
Divekar, Dileep A. ; Dowell, Richard I.
Author_Institution
ZyMos Corporation, Sunnyvale, CA, USA
Volume
3
Issue
1
fYear
1984
fDate
1/1/1984 12:00:00 AM
Firstpage
80
Lastpage
87
Abstract
A four-terminal model is formulated for the depletion-mode MOSFET using simple charge-voltage relationships. Different regions of operation are taken into account according to the surface conditions such as accumulation, depletion, and inversion. This simple formulation is then modified to account for the second-order effects such as mobility reduction, drift-velocity saturation, and channel length modulation. Simple expressions are used to express the model parameters in terms of device dimensions. A charge-based capacitance model is used to compute transient currents. The depletion-mode model is implemented in the circuit simulation program HP-SPICE and the simulation results are discussed.
Keywords
Capacitance; Circuit noise; Circuit simulation; Large scale integration; Logic devices; MOSFET circuits; Noise reduction; Power MOSFET; Threshold voltage; Tires;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.1984.1270060
Filename
1270060
Link To Document