• DocumentCode
    912937
  • Title

    Hierarchical VLSI Routing--An Approximate Routing Procedure

  • Author

    Patel, Ash M. ; Soong, Norman L. ; Korn, Robert K.

  • Author_Institution
    Sperry Univac, Blue Bell, PA, USA
  • Volume
    4
  • Issue
    2
  • fYear
    1985
  • fDate
    4/1/1985 12:00:00 AM
  • Firstpage
    121
  • Lastpage
    126
  • Abstract
    This paper describes an approximate routing procedure. The procedure is quite general and could be applied to both printed circuit boards and integrated circuit chip wiring procedures where a hierarchical wiring scheme is utilized. This procedure has been incorporated in sperry´s automatic gate array chip layout system.
  • Keywords
    Ash; Costs; Digital systems; Integrated circuit packaging; Iterative algorithms; Printed circuits; Routing; Very large scale integration; Wires; Wiring;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.1985.1270104
  • Filename
    1270104
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=912937