Title :
Dynamic capacitance effects in DRAM word lines
Author_Institution :
IBM Research Division, Thomas J. Watson Research Center, New York, USA
fDate :
2/1/1988 12:00:00 AM
Abstract :
Examination of the total effective word line capacitance loading a DRAM word line driver reveals a dynamic effect which changes the capacitance relative to static computations. The magnitude of the `dynamic¿ capacitance can be significant when the rates of change of the storage node and word line voltage waveforms are comparable. The source of this effect is shown to be charge transfer between storage nodes and bit lines during the activation of the word line. Implications of the dynamic effect for word line design and boosting in the 1/2 VDD sensing scheme are discussed. The effect occurs for any sensing scheme; it represents another variable affecting overall sensing performance in dynamic RAM.
Keywords :
capacitance; integrated memory circuits; random-access storage; 1/2 VDD sensing scheme; DRAM word lines; bit lines; charge transfer; dynamic RAMs; dynamic effect; memory circuits; storage nodes; total effective word line capacitance;
Journal_Title :
Solid-State and Electron Devices, IEE Proceedings I
DOI :
10.1049/ip-i-1.1988.0001