DocumentCode
913285
Title
A Physical and SPICE-Compatible Model for the MOS Depletion Device
Author
Ma, Di
Author_Institution
Standard Microsystems Corporation, Hauppauge, NY, USA
Volume
4
Issue
3
fYear
1985
fDate
7/1/1985 12:00:00 AM
Firstpage
349
Lastpage
356
Abstract
An MOS depletion device model that is compatible with SPICE circuit simulation program and based on device physics is described. The depletion device is modeled by an equivalent circuit consisting of various well-characterized semiconductor devices, for example, the enhancement MOS device and the JFET. IT has the advantages of both the existing physical and empirical models. The model is applicable to immediate circuit simulation and device fabrication. Derivation of the model along with its parameters for the Gaussian impurity distribution is given. Implementation of circuit simulation with SPICE is demonstrated. More accurate results compared to the empirical model are obtained.
Keywords
Circuit simulation; Curve fitting; Design automation; Equivalent circuits; Fabrication; Impurities; JFET circuits; Physics; SPICE; Voltage;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.1985.1270131
Filename
1270131
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