Title :
A vertically integrated GaAs bipolar dynamic RAM cell with storage times of 4.5 h at room temperature
Author :
Stellwag, T.B. ; Cooper, James A., Jr. ; Melloch, Michael R.
Author_Institution :
Sch. of Electr. Eng., Purdue Univ., West Lafayette, IN, USA
Abstract :
The storage times of FET-accessed GaAs dynamic RAM cells are limited to less than 1 min at room temperature by gate leakage in the access transistor. These transistor leakage mechanisms have been eliminated by designing a vertically integrated DRAM cell in which an n-p-n bipolar access transistor is merged with a p-n-p storage capacitor. Storage times of 4.5 h are obtained at room temperature, a 1000-fold increase over the best FET-accessed cells.<>
Keywords :
DRAM chips; III-V semiconductors; bipolar integrated circuits; gallium arsenide; 4.5 h; GaAs; bipolar dynamic RAM cell; gate leakage elimination; n-p-n bipolar access transistor; p-n-p storage capacitor; room temperature; storage times; vertically integrated DRAM cell; Capacitors; DRAM chips; FETs; Gallium arsenide; Gate leakage; P-n junctions; Random access memory; Senior members; Substrates; Temperature;
Journal_Title :
Electron Device Letters, IEEE
