Fast synthesised cyclic-parallel analogue- digital convertor

A circuit technique is described for parallel synthesis of the folded waveform required for input to the parallel convertor of a cyclic-parallel digitiser. This has a significant speed advantage over the serial cyclic approach and does not suffer from an overrange problem. Cost is lower than for an all-parallel approach, and the system has potential development in both very-high-speed and higher-resolution directions. The development of single-chip high-speed-flash convertors will make the cyclic-parallel type of convertor attractive by virtue of increased resolution with lower part count and cost, and by reducing the capacitance driving problem of the all-parallel-approach. Some static and dynamic performance figure are presented for a prototype convertor.