Title :
Fast versatile binary comparator array
Author_Institution :
Kingston Polytechnic, School of Physics, Kingston upon Thames, UK
Abstract :
A 1-dimensional cascaded structure is normally employed with binary comparators operating in the parallel mode. An assignment of cell output states is proposed which enables a faster 2-dimensional array to be formed. An optional facility for detecting inputs of zero value may be simply incorporated in the design.
Keywords :
cellular arrays; comparators (circuits); logic design; cellular array; fast versatile binary comparator array; inputs of zero value detecting facility; logic design; parallel mode; two dimensional array;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19710152
