Title :
Process-Based Three-Dimensional Capacitance Simulation -- TRICEPS
Author :
Uebbing, Reinhold H. ; Fukuma, Masao
Author_Institution :
Components Group, Siemens AG, Munich, West Germany
fDate :
1/1/1986 12:00:00 AM
Abstract :
A novel three-dimensional (3-D) wiring capacitance simulator for VLSI circuits has been developed and successfully used in various applications, including DRAM-design. The simulator, TRICEPS, determines fully automatically 3-D total and coupling capacitances from mask and processing information. A novel simple input format, versatility, fast calculation time, and no need for any user interference make it a useful interactive development tool for dense VLSI circuits.
Keywords :
Circuit simulation; Coupling circuits; Delay; Integrated circuit interconnections; National electric code; Nonhomogeneous media; Parasitic capacitance; Very large scale integration; Wire; Wiring;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.1986.1270189
