DocumentCode :
914658
Title :
Symbolic Layout for Bipolar and MOS VLSI
Author :
Szabo, Kevin S. ; Leask, James M. ; Elmasry, Mohamed I.
Author_Institution :
Bell-Northern Research, Ottawa, Ontario, Canada
Volume :
6
Issue :
2
fYear :
1987
fDate :
3/1/1987 12:00:00 AM
Firstpage :
202
Lastpage :
210
Abstract :
VLSI design requires design methodologies which are tailored to the implementation technology. Symbolic layout has been addressed in the past for MOS technology, while bipolar technology has largely been ignored. This paper describes a novel symbolic design technique which addresses both bipolar and MOS technologies. The technique allows the designer to symbolically layout nMOS, CMOS, and bipolar circuit structures. The symbol set is used for both MOS and bipolar devices in an integrated and consistent way. It is closely related to the mask layout information rather than circuit schematics. Thus, it allows the creation of any circuit structure based on bipolar, MOS, CMOS, BIMOS, and BICMOS technologies. Design examples are given.
Keywords :
BiCMOS integrated circuits; CMOS logic circuits; CMOS technology; Design automation; Design methodology; Integrated circuit technology; Low voltage; MOS devices; Silicon; Very large scale integration;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.1987.1270264
Filename :
1270264
Link To Document :
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